Interfacing Linux and IP blocks on FPGA platforms

Project goal

Goal of the project is to develop userspace libraries and device drivers for communication with custom IP blocks on FPGA hardware for digital signal processing. Developed tools have to enable user to transfer data between PS (Processing System) and PL (Programmable Logic) of the device (Xilinx Zynq UltraScale is suggested device). Additional tasks include:

• research of tools for digital design,
• reserach of AXI perihperal bus,
• research of existing tools for PS/PL interface through AXI bus,
• demonstrate functionalities of developed tools on practical examples.

Requirements

Requirements:

• C
• Embedded Linux
• VHDL, Verilog